Learning How to Teach Chip Design

In September, Prof. Adam Teman was invited to India to teach a Train the Trainer (TTT) course on teaching chip design. The five-day course was attended by 54 faculty members from faculties of engineering of universities and colleges across India. It was initiated by the AICTE, an organization for the promotion of technology education in India, in collaboration with Cadence Design Systems, a global leader in EDA and intelligent system design; they also generously offered their modern facilities in Bangalore, India’s hi-tech capital, as the location for the conference.

Prof. Teman’s course in Bangalore is based on the course Digital VLSI Design, which he designed when he first joined the Faculty of Engineering at Bar-Ilan. “A few years ago, I uploaded the course recordings to YouTube, and it became pretty popular worldwide,” shares Prof. Teman. “It’s unique in that is teaches, in a very methodical and academic manner, material that is hard to find in open sources. It links between the theory of the processes and algorithms of chip design and the industry’s engineering practices. Thanks to its popularity, I became one of the field’s better known teachers, if not the most.”

The Bangalore course included lectures and theoretical content taught by Prof. Teman, alongside training in Cadence’s systems and practical labs conducted by the Cadence Bangalore support team of over 2,000 employees. “The course was a resounding success, and feedback was excellent,” says Prof. Teman. “Other versions are already in planning in India and worldwide, as well as future collaborations between the Faculty of Engineering at Bar-Ilan, Cadence, and numerous Indian universities whose faculty members attended the course.”