תכנון מנגנוני שליטה ופריפריה מתקדמים לזיכרונות דינאמיים

הרקע לפרויקט:

Gain-cell embedded DRAM (GC-eDRAM) is a dynamic storage technology that presents an alternative to standard SRAM for various applications. In this project, novel circuit techniques will be developed for GC-eDRAM based memories to improve performance, power, and area (PPA) costs.

מטרת הפרויקט:

The project outcome is a novel technique for improving the GC-eDRAM technology

תכולת הפרויקט:

This work will include the investigation of sophisticated refresh schemes, advanced write-back techniques, and others. This research project will include Virtuoso based simulations in advanced CMOS nodes

קורסי קדם:

מעגלים אלקטרוניים ספרתיים

דרישות נוספות:

מעגלים משולבים ספרתיים 83-313

מקורות:

1. P. Meinerzhagen, A. Teman, R. Giterman, N. Edri, A. Burg, and A. Fish, Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip. Berlin, Germany: Springer, 2018.
2. Teman A, Meinerzhagen P, Burg A, Fish A (2012) Review and classification of gain cell eDRAM implementations. In: Proc. IEEE Convention of Electrical and Electronics Engineers in Israel (IEEEI), pp 1–5
3. Refresh Algorithm for Ensuring 100% Memory Availability in Gain-Cell Embedded DRAM Macros https://ieeexplore.ieee.org/document/9495814
4. A 4T GC-eDRAM Bitcell with Differential Readout Mechanism For High Performance Applications https://ieeexplore.ieee.org/document/10559672