ד"ר אדם תימן מעגלים משולבים ספרתיים 83-313
Primary Text Books |
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Digital integrated circuits : a design perspective by Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic Publisher: Pearson Education 621.395 RAB d2 |
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Modern semiconductor devices for integrated circuits Chenming Calvin Hu Publisher: Prentice Hall 621.381531 HU m Full text Chapter 3 |
Additional reading |
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Silicon VLSI technology : fundamentals, practice, and modeling by James D. Plummer, Michael Deal, Peter B. Griffin Publisher: Prentice Hall 621.38152 PLU s |
| E. Alon, Berkeley EE-141, Lectures 2,4 (Fall 2009) | |
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Operation and modeling of the MOS transistor Yannis Tsividis, Colin McAndrew Publisher: Oxford University Press 621.3815284 TSI o3 |
| M. Alam, Purdue ECE-606 – lectures 32-38 (2009) | |
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Compact MOSFET Models for VLSI Design A.B. Bhattacharyya. Singapore: John Wiley & Sons Asia, 2010 eBook |
| "A JSSC classic paper: The simple model of CMOS drain current," in IEEE Solid-State Circuits Society Newsletter, vol. 9, no. 4, pp. 4-5, Oct. 2004, doi: 10.1109/N-SSC.2004.6500052. |
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| Kuhn, K., Kenyon, C., Kornfeld, A., Liu, M., Maheshwari, A., Wei-kai Shih, Sivakumar, S., Taylor, G., VanDerVoorn, P., & Zawadzki, K. (2008). Managing Process Variation in Intel’s 45nm CMOS Technology. Intel Technology Journal, 12(2), 93–109. |
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| BSIM 4.6.4 User’s Manual | |
| Y. Nishi, "Impact of scaling and the scaling development environment," in IEEE Solid-State Circuits Society Newsletter, vol. 12, no. 1, pp. 31-32, Winter 2007, doi: 10.1109/N-SSC.2007.4785539. |
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| B. Nicolic, Berkeley EE-241, Lectures 1-5 (Spring 2011) | |
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CMOS VLSI design : a circuits and systems perspective by Neil H.E. Weste, David Harris Publisher: Pearson/Addison-Wesley 621.395 WES c3 c2011; 4th ed. 1993; 2nd ed. |
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Digital System Clocking : High Performance and Low-Power Aspects Vojin G. Oklobdzjja, Vladlmlr M. Stojanovic, Dejan M. Markovic, Nikola M. Nedovic. New York: IEEE, 2004 eBook |
תאריך עדכון אחרון : 25/10/2020
