הקמת מערך בדיקה וחקירה של שבב לאחר ייצור

שלחו לחבר
שנה
2017
אחראי אקדמי

Post-Silicon Validation Setup Erection and Exploration

At the start of the next academic year, the EnICS labs will receive its flagship project's chip back from manufacturing. The aim of this project is to develop a full validation environment for it, including communication and data processing. This project will include FPGA engineering, design tools, HDL coding along with hands-on lab experience.

This project is open for both Nano-Electronics students and Computer Engineering students.

דרישות:

Verilog

לפרטים:

דוד צוקר