Analog to Digital Converter based the SAR (Successive Approximation Register) Algorithm

הרקע לפרויקט:

Analog to digital converters are used to transfer real-world information, which is analog, to the digital domain for further signal processing. This is an extremely important function which is prevalent in all computer systems. There is a constant battle to improve performance, lower power, increase bandwidth and other performance parameters.

מטרת הפרויקט:

In this project you will design a highly compact analog to digital converter (ADC) using the SAR (Successive Approximation Register). The SAR topology is one of the most attractive for low power and compact ADC applications. It is also a relatively simple architecture conceptually and lends itself to many types of optimizations to improve accuracy, reduce area and enable low power operation. You will need to learn the theory and then implement the circuit in 65nm CMOS. The SAR ADC includes both analog and digital blocks, which will allow you to develop skills in both.

תכולת הפרויקט:

In this project the student will design a SAR ADC using digital and analog techniques. The schematics will be prepared in Virtuoso and simulated. Layout and post-layout simulations will be conducted to verify the circuit performance.

קורסי קדם:

• 768330301 אלקטרוניקה לינארית - חובה
• 768332501 מעבדה למעגלים אנלוגיים – חובה
• 8330801 מעגלים אלקטרוניים ספרתיים – חובה
• 83315 מעבדה מעגלים אלקטרוניים ספרתיים – חובה
• 768361101 מעגלים משולבים אנלוגיים – מומלץ

דרישות נוספות:

a lot of motivation!!!

מקורות:

1. Analog Integrated Circuit Design – Tony Chan Carusone, David Johns and Kenneth Martin – John Wiley Publishers. Chapters 16 and 17
2. “A compact 10-b SAR ADC with unit-length capacitors and a passive FIR filter” P Harpe IEEE Journal of Solid-State Circuits 54 (3), 636-645