Design of radiation hardened LDPC encoder and decoder in hardware

הרקע לפרויקט:

Low-Density Parity Check (LDPC) codes represent a class of error correcting codes that may be employed for providing error correction. Using LDPC codes, channel capacities that are close to the theoretical Shannon Limit can be achieved.

Hardware in space faces many challenges that can cause a bit-flip and errors to be found in the memory and thus an ECC of some sort is needed.

LDPC encoder and decoder can be used as an ECC for memory arrays and the interest of this project is to actually implement this in hardware using radiation hardening by design techniques.

מטרת הפרויקט:

The goal of this project is to design an LDPC encoder and decoder in hardware that will implement radiation hardening techniques that will be learned during the project.

תכולת הפרויקט:

Design and implement an LDPC encoder and decoder in hardware.

קורסי קדם:

• מעגלים אלקטרונים ספרתיים

מקורות:

1. https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=1204466