In-memory computing using the GC-eDRAM

הרקע לפרויקט:

Gain-cell embedded DRAM (GC-eDRAM) is a memory technology that has been shown to be an interesting alternative to standard SRAM for various applications. The GC-eDRAM memory is based on a dynamic bitcell that does not have a constant power supply. The dynamic nature of the cell leads to limited data retention time (DRT) due to parasitic leakage currents. But it also creates opportunities to explore in utilizing these mechanisms to our advantage.

מטרת הפרויקט:

The unique features of the GC-eDRAM memories, require specialized memory block design, but also an opening for implementing in-memory logical computations with very little overhead. For example readout of an logical "NOR" function result for two adjacent memory rows can be performed in such a memory with very little overhead. In this project we aim to design a GC-eDRAM memory that will allow to perform various logical computation with data stored in the memory.

תכולת הפרויקט:

The students will develop a unique memory design and architecture. They will be required to suggest and implement novel ideas in memory design and run various simulations to prove the suggested memories reliability.

קורסי קדם:

מעגלים אלקטרוניים ספרתיים

דרישות נוספות:

Digital Integrated Circuits (83-313)

מקורות:

1. P. Meinerzhagen, A. Teman, R. Giterman, N. Edri, A. Burg, and A. Fish, Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip. Berlin, Germany: Springer, 2018.
2. Teman A, Meinerzhagen P, Burg A, Fish A (2012) Review and classification of gain cell eDRAM implementations. In: Proc. IEEE Convention of Electrical and Electronics Engineers in Israel (IEEEI), pp 1–5