Spintronic Computing

Newly available materials and devices are being evaluated as building blocks for next generation beyond-CMOS computing. Switching devices can be classified into three broad groups: non-binary logic families (e.g., quantum computing), binary logic families with complementary field-effect transistors (e.g., graphene and carbon nanotube FETs), and binary logic families with a novel logic structure (e.g., spintronics, graphene, carbon nanotubes, molecular electronics, and nanowires). Significant challenges prevent the implementation of these logic families, and none of these technologies are currently ready for use on a large scale. While there is exciting potential to provide improved power and performance, essential functionality considerations are a major concern. Cascading, one device directly driving another device, is a particularly significant challenge for novel logic structures, and few emerging technologies have demonstrated this capability.

In this talk, specific issues facing several proposed spintronic logic families will be discussed, with an emphasis on the need to cascade logic gates. Additionally, three recently proposed spintronic logic families will be described in which cascaded circuits are realized. Two logic families, Spin-Diode Logic and Emitter-Coupled Spin-Transistor Logic, exploit the unique magnetoresistive properties of Mn-doped semiconductor III-V heterojunctions. Additionally, All-Carbon Spin Logic performs spintronic computing solely with graphene nanoribbons and carbon nanotubes. This work provides a pathway for power-efficient computing beyond 10 GHz, making possible the replacement of CMOS for general-purpose computing. Future directions for the field of computing will be considered, including proposals for advancing the development of integrated circuits for application to spintronic FPGAs and non-Von Neumann memory-in-logic architectures.

13/06/2013 - 10:00
Joseph Shimon Friedman
דוא"ל להרשמה: 
Northwestern University
building 1103, Room 329