Heterogeneity within a Core for Improved Power Efficiency and Higher Reliability

Abstract: An asymmetric multicore processor (AMP) comprises cores with different sizes of microarchitectural resources yielding very different performance and energy characteristics.  Since the computational demands of workloads vary from one task to the other, AMPs can often provide a higher power efficiency than symmetric multicores.
Furthermore, as the computational demands of a task change during its course of execution, reassigning the task from one core to another, where it can run more efficiently, can further improve the overall power efficiency. However, too frequent reassignments of tasks to cores may result in high overhead.
This overhead can be greatly reduced by designing a morphable core that can dynamically adapt its resource sizes, operating frequency and voltage to assume one of four possible core configurations.  Such a morphable architecture allows more frequent task to core configuration reassignments for a better match between the current needs of the task and the available resources.
Our results indicate that the proposed morphable architecture controlled by a runtime management scheme can improve the throughput/Watt and reduce the vulnerability to soft errors over executing on a standard out-of-order core.
Bio: Israel Koren is a Professor of Electrical and Computer Engineering at the
University of Massachusetts, Amherst and a fellow of the IEEE.
He has been a consultant to companies like IBM, Analog Devices, Intel, AMD and National Semiconductors. His research interests include Fault-Tolerant systems, secure cryptographic devices, Computer architecture and computer arithmetic. He publishes extensively and has over 250 publications in refereed journals and conferences. He is the author of the textbook "Computer Arithmetic Algorithms," 2nd Edition, A.K.  Peters, Ltd., 2002, and a co-author of the textbook "Fault Tolerant Systems," Morgan-Kaufman, 2007.

28/05/2015 - 14:00 - 15:00
Israel Koren
דוא"ל להרשמה: 
Electrical and Computer Engineering, University of Massachusetts at Amherst, and Faculty of Engineering,  Bar-Ilan University
Engineering Building 1103, Room 329