תכנון מעגלי זיכרון דינמי מתקדמים
Design of Advanced Gain-Cell embedded DRAM circuits
Gain-cell embedded DRAM (GC-eDRAM) is a dynamic storage technology that presents an alternative to standard SRAM for various applications. In this project, novel circuit techniques will be developed for GC-eDRAM based memories to improve performance, power, and area (PPA) costs. This will include the investigation of ternary (three-level) storage, advanced write-back techniques, and others. This research project will include Virtuoso based simulation in advanced CMOS nodes.
83-313 - required. Will include Virtuoso simulations and possibly layout, digital (Verilog) design and other chip design skills.