בחינת תקיפות הספק חדישות על מערכות-על-שבב

Examining state-of-the-art Power Analysis Attacks on SOCs

Today, most of the communication devices integrated in smartphones, computers, cars, etc. have a cryptographic co-processor which enables encrypted communications. This cryptographic circuits are based on high-end algorithms that are mathematically (almost) impossible to break. Alas, once one implements those algorithms in hardware, there are some information leaks through side channels (such as power consumption) that may be exploited in order to retrieve the secret information (key). In this project, the students will examine existing and develop state-of-the-art power analysis methods for both regular unprotected circuits and for a novel, recently developed circuits with various protections against information leakage. As such, the students will try and evaluate the performance of the protection. The project will involve using Cadence tools for simulation, MATLAB or Python for analysis. Eventually, real chip (Fabricated by the EnICs Lab, BIU) evaluation will be performed.

This project is open for both the Nano-Electronics students and Computer Engineering students.

דרישות:

Verilog, MATLAB/Python

לפרטים:

דוד צוקר