בחינת תקיפות הספק מתקדמות על זכרונות

Examining state-of-the-art Power Analysis Attacks on memories

Many devices uses restricted rows inside a memory block to store sensitive information, such as an encryption key. Most times, the user can't access these rows directly, but may access neighboring, non-sensitive rows. Power Analysis Attacks rely on the fact that physical transitions inside the hardware leaks information through the power rails. In this project the students will try to analyze the amount of information that can be extracted indirectly from memories using known power analysis methods. The project will be done in the Virtuoso environment, and depending on the findings, may be expanded to real chip measurements.

דרישות:

מעבדה במעגלים אלקטרוניים ספרתיים או במעגלים משולבים (או ידע ב-Cadence Virtuoso).

לפרטים:

מעוז ויצנטובסקי