הגנות על מעגלי הפריפרייה של מערכי זיכרון מסוג SRAM מפני התקפות הספק

Protection of SRAM memory arrays peripherals from power analysis attacks

Side channel attacks exploits the physical imperfections of hardware to circumvent security features achieved by mathematically secure protocols and algorithms. This is achieved by monitoring physical quantities, usually power consumption or electromagnetic radiation, which contain information about the secret data. As a countermeasure, several circuit styles have been proposed for designing side-channel resistant logic gates and flip-flops. In the field of SRAM memory array, little research has been made to protect the array’s dynamic power consumption from information leakage. This project will aim at developing a new module from the architecture point of view, that will be responsible on masking the power consumption of the stored data.

דרישות:

מעבדה מתקדמת למעגלים ספרתיים, מעבדה למעגלים משולבים

לפרטים:

מעוז ויצנטובסקי